CPU instructions need to know where to find their operands (the data they operate on). Operands could be in registers, memory, or embedded in the instruction itself. How does the CPU know which one?
Addressing Mode defines how a CPU instruction specifies the location of its operands — whether in registers, memory, or as immediate values embedded in the instruction.
- Instruction encoding includes opcode (what to do) and addressing mode specifier (where data is)
- CPU decodes the addressing mode to determine how to fetch operands
- Different modes: immediate (value in instruction), register (in register), direct (memory address in instruction), etc.
- Complex modes combine: base + index, base + displacement
- Programmer/compiler chooses addressing mode based on data location and access pattern
- Makes CPU instructions flexible and powerful
- Different modes for different use cases (constants, arrays, structs, etc.)
- More addressing modes = more complex instruction decoding
- Choice of addressing mode affects instruction length and execution speed
- Built from: Instruction Set, CPU, Operand
- Builds into: Immediate Addressing, Register Addressing, Direct Addressing
- Builds into: Indirect Addressing, Indexed Addressing
- Related: Effective Address, Memory Address
- More addressing modes = more complex hardware (decoder logic)
- Some modes are slower (indirect, indexed) due to extra memory accesses
- Not all CPUs support all addressing modes (RISC typically has fewer)
- Invalid addressing mode encoding causes illegal instruction exception