• ↑↓ pour naviguer
  • pour ouvrir
  • pour sélectionner
  • ⌘ ⌥ ↵ pour ouvrir dans un panneau
  • ←→ pour naviguer
  • esc pour rejeter
⌘ '
raccourcis clavier

The Problem

The CPU cannot directly manipulate hardware signals (move disk arm, read magnetic flux). It needs a hardware intermediary that understands both the CPU’s bus interface and the device’s physical interface.

Core Idea

A device controller is a hardware component that interfaces between the system bus and the physical I/O device, containing registers for commands, data, and status, plus local buffers for data transfer.

How It Works

  1. CPU (via driver) writes commands and parameters to controller’s registers
  2. Controller parses registers to determine operation (read/write/seek)
  3. Controller executes operation on the physical device
  4. Data transfers to/from controller’s local buffer
  5. Controller raises interrupt when operation completes
  6. CPU reads status register to check success/failure
controller cluster_ctrl Device Controller CPU CPU Bus System Bus (Data/Addr/Ctrl) CPU->Bus writes commands CtrlRegs Control Registers (command, status) Bus->CtrlRegs register writes CtrlRegs->Bus interrupt Logic Control Logic (state machine) CtrlRegs->Logic DataBuf Data Buffer (local) Logic->DataBuf Device I/O Device (e.g., Disk, NIC) Logic->Device physical signals Device->DataBuf data

Key Properties

  • Contains three types of registers: control, data, and status
  • Has local buffer to hold data during transfer
  • Can operate asynchronously from CPU (using DMA)
  • Sits on the system bus, addressed like memory (memory-mapped I/O)

Connections

Edge Cases & Gotchas

  • Register addresses vary by device — driver must know the correct addresses
  • Local buffer size limits transfer size per operation
  • Status register must be read before another command is issued
  • Some controllers have buggy implementations causing race conditions