| Computer Organization | Computer Architecture |
|---|---|
| Physical implementation | Logical design |
| Hardware details | Instruction set design |
| Memory technology, interfaces | Instruction formats, addressing modes |
- Input Unit - Keyboard, Mouse, Scanner
- Output Unit - Monitor, Printer, Speaker
- Memory Unit - RAM, ROM, Cache
- ALU - Arithmetic and Logic operations
- Control Unit - Coordinates all operations
Input → Memory → ALU → Memory → Output
↑
↓
Control Unit
Von Neumann:
- Single memory for data and instructions
- Sequential execution
- Bottleneck: Single bus
Harvard:
- Separate memories for data and instructions
- Parallel access
- Higher performance
Execution Time = (Instruction Count × CPI) / Clock Rate
CPU Time = CPU Clock Cycles × Clock Cycle Time
MIPS = Instruction Count / (Execution Time × 10^6)
Speedup = 1 / [(1 - P) + (P / S)]
Where P = enhanced portion, S = speedup of enhanced portion
| Type | Description | Example |
|---|---|---|
| SISD | Single Instruction, Single Data | Traditional PC |
| SIMD | Single Instruction, Multiple Data | GPU |
| MISD | Multiple Instruction, Single Data | Rare |
| MIMD | Multiple Instruction, Multiple Data | Multiprocessor |