CPU, memory, and I/O controllers need to communicate — transferring data, addresses, and control signals. Individual wires between every pair would be impossible. A shared communication pathway is needed.
The system bus is the shared communication pathway connecting CPU, memory, and I/O controllers, consisting of three parts: data bus, address bus, and control bus.
The system bus has three components:
- Data Bus: Carries actual data between devices (bidirectional)
- Address Bus: Carries memory/device addresses (unidirectional from CPU)
- Control Bus: Carries control signals (read, write, interrupt, clock)
- Shared by all components (requires bus arbitration)
- Width (bits) determines performance (64-bit bus = 8 bytes/transfer)
- Clock speed limits transfer rate
- Modern systems may have multiple buses (PCIe, memory bus, etc.)
- Built from: O System, CPU, Device Controller
- Builds into: DMA, O Request to Hardware Operation
- Related: Device Controller, Main Memory
- Contrasts with: O Software Structure (hardware vs software)
- Bus contention: multiple devices wanting the bus simultaneously
- Bus mastering: devices (like DMA) can become bus masters
- Modern systems have switched fabrics (PCIe) instead of shared buses