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raccourcis clavier

The Problem

Systems need to transfer data between multiple I/O devices and memory. A DMA controller that can only handle one device at a time creates a bottleneck when multiple devices need simultaneous transfers.

Core Idea

Single-Channel DMA is a DMA configuration where only one DMA channel (and thus one device) can be active at a time — the DMA controller has a single set of address, count, and control registers.

How It Works

  1. CPU programs the single DMA channel with device, addresses, and count
  2. DMA controller performs the transfer for that one device
  3. When transfer completes, CPU can program the channel for a different device
  4. Only one device can use DMA at any given time — others must wait or use Programmed I/O
single_channel DMAC DMA Controller (Single Channel: 1 set of regs) Dev1 Device 1 (disk) DMAC->Dev1 active Dev2 Device 2 (NIC) DMAC->Dev2 waiting Dev3 Device 3 (sound) DMAC->Dev3 waiting

Key Properties

  • Simple hardware — only one set of DMA registers needed
  • Cheaper to implement than multi-channel DMA
  • Creates bottleneck when multiple devices need DMA simultaneously
  • Common in early or low-cost systems

Connections

Edge Cases & Gotchas

  • Device starvation: high-priority device may wait long if low-priority device is using DMA
  • No concurrent DMA transfers — can’t overlap disk read with network packet send
  • Some single-channel DMACs support “chaining” — auto-program next transfer after current one