• ↑↓ pour naviguer
  • pour ouvrir
  • pour sélectionner
  • ⌘ ⌥ ↵ pour ouvrir dans un panneau
  • ←→ pour naviguer
  • esc pour rejeter
⌘ '
raccourcis clavier

The Problem

Early CPUs had few registers and slow memory. To make programming easier and code smaller, can we put complex operations (like “load, add, store” all in one instruction) directly in hardware?

Core Idea

CISC (Complex Instruction Set Computer) uses a large set of complex instructions where a single instruction can perform multi-step operations (e.g., load from memory, add, and store — all in one instruction).

How It Works

  1. CPU has a large set of instructions (hundreds), some very complex
  2. Instructions have variable length (1 to 15+ bytes) — harder to decode
  3. Complex instructions take multiple clock cycles to execute
  4. Hardware handles complex operations — less work for compiler/software
  5. Fewer instructions per program, but each instruction does more work
cisc Compiler Compiler (simple translation, fewer instructions) InstrSet Complex Instructions (variable length, multi-cycle) Compiler->InstrSet generates CPU CISC CPU (complex hardware, slower clock) InstrSet->CPU executes Pipelining Pipelining (difficult due to variable length) CPU->Pipelining harder to implement

Key Properties

  • Large instruction set (hundreds of instructions)
  • Variable instruction length (1-15+ bytes, harder to decode)
  • Multiple clock cycles per instruction
  • Complex hardware (more transistors, harder to design)
  • Smaller programs (fewer instructions needed)

Connections

Edge Cases & Gotchas

  • Pipelines are harder to implement due to variable instruction length
  • Slower clock speeds due to complex hardware
  • Many instructions are rarely used (wasted silicon)
  • Modern x86 CPUs are “RISC inside” — they translate CISC instructions to micro-ops